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1 Branch Target Cache
Information technology: BTCУниверсальный русско-английский словарь > Branch Target Cache
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2 Branch-Target Address Cache
Information technology: BTACУниверсальный русско-английский словарь > Branch-Target Address Cache
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3 branch target address cache
Network technologies: BTACУниверсальный русско-английский словарь > branch target address cache
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4 кэш-память целевых команд ветвлений
Information technology: branch target cacheУниверсальный русско-английский словарь > кэш-память целевых команд ветвлений
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5 патентованная кэш-память ВТС
Engineering: branch target cacheУниверсальный русско-английский словарь > патентованная кэш-память ВТС
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6 кэш адресов переходов
Information technology: BTAC, branch target address cacheУниверсальный русско-английский словарь > кэш адресов переходов
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7 кэш-память адресов ветвлений
1) Information technology: BTAC2) Network technologies: branch target address cacheУниверсальный русско-английский словарь > кэш-память адресов ветвлений
См. также в других словарях:
Branch target predictor — In computer architecture, a branch target predictor is the part of a processor that predicts the target of a conditional branch or unconditional jump instruction before that instruction has been fetched from the instruction cache. The instruction … Wikipedia
Branch predictor — In computer architecture, a branch predictor is the part of a processor that determines whether a conditional branch in the instruction flow of a program is likely to be taken or not. This is called branch prediction. Branch predictors are… … Wikipedia
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Branch Prediction — Die Sprungvorhersage (engl. branch prediction) wird in der (Mikro )Rechnerarchitekur verwendet und behandelt das Problem von Mikroprozessoren, alle Stufen ihrer Pipeline möglichst immer und sinnvoll auszulasten. Inhaltsverzeichnis 1 Übersicht 2… … Deutsch Wikipedia
Branch prediction — Die Sprungvorhersage (engl. branch prediction) wird in der (Mikro )Rechnerarchitekur verwendet und behandelt das Problem von Mikroprozessoren, alle Stufen ihrer Pipeline möglichst immer und sinnvoll auszulasten. Inhaltsverzeichnis 1 Übersicht 2… … Deutsch Wikipedia
BTAC — Branch Target Address Cache (Computing » General) … Abbreviations dictionary
Classic RISC pipeline — In the history of computer hardware, some early reduced instruction set computer central processing units (RISC CPUs) used a very similar architectural solution, now called a classic RISC pipeline. Those CPUs were: MIPS, SPARC, Motorola 88000,… … Wikipedia
PA-8000 — HP PA 8000. The PA 8000 (PCX U), code named Onyx, is a microprocessor developed and fabricated by Hewlett Packard (HP) that implemented the PA RISC 2.0 instruction set architecture (ISA).[1] It was a completely new design with no circuitr … Wikipedia
AMD K10 — The AMD K10 is AMD s latest microprocessor architecture. Though there were once reports that the K10 had been cancelled [http://www.theinquirer.net/?article=27421 AMD s K10 is delayed or dead] , The Inquirer] , the first third generation Opteron… … Wikipedia
Sprungvorhersage — Die Sprungvorhersage (englisch branch prediction) wird in der (Mikro )Rechnerarchitekur verwendet und behandelt das Problem von Mikroprozessoren, alle Stufen ihrer Pipeline möglichst immer und sinnvoll auszulasten. Inhaltsverzeichnis 1… … Deutsch Wikipedia
Emotion Engine — The Emotion Engine is a CPU developed and manufactured by Sony and Toshiba for use in the Sony PlayStation 2 video game console. Mass production of the Emotion Engine began in 1999. Description The Emotion Engine consists of eight separate units … Wikipedia